銆�銆�MTK6789(MT6789)瀹夊崜鏍稿績鏉垮熀浜庤仈鍙戠鍏牳CPU錛岄噰鐢ㄥ彴縐數6nm宸ヨ壓鍒剁▼錛岄厤澶囦袱涓珮鎬ц兘Arm
Cortex-A76澶ф牳錛屼富棰戦珮杈?.2GHz錛屼互鍙婂叚棰?.0GHz鐨凜ortex-A55灝忔牳錛岃繍琛孉ndroid
13.0緋葷粺錛岄珮杈?133MHz鐨勯珮鎬ц兘LPDDR4X鍐呭瓨鍜屽揩閫熺殑UFS 2.2綰у瓨鍌ㄥ姞閫熶簡鏁版嵁璁塊棶銆?/p>
銆�銆�闆嗘垚Arm Mali G57 MC2 GPU錛屾敮鎸佹竻鏅般�侀珮鍒嗚鯨鐜囩殑 Full HD+
鏄劇ず灞忥紝鏈�澶ф樉紺哄垎杈ㄧ巼2520脳1080錛屽叿鏈夎秴蹇殑120Hz鍒鋒柊鐜囷紝鏀寔H264/H265/JPEG
緙栬В鐮佸櫒銆傛爣閰?GB榪愯鍐呭瓨鍜?4GB瀛樺偍絀洪棿錛屽彲閫?GB+128GB鍐呭瓨銆?/p>
銆�銆�鏀寔108MP鐨勪富鎽勫儚澶達紝16+16MP鍙屾憚鍍忓ご錛屼嬌鐢ㄦ埛鑳藉鎹曟崏鍒拌緇嗙殑鐓х墖銆備笌鍏朵粬鑱斿彂縐慔elio緋誨垪鑺墖緇勭浉姣旓紝灝哄綰у浘鍍忚川閲忔妧鏈彁渚涗簡鍗撹秺鐨勬憚褰辨晥鏋溿�傛彁渚涙祦鐣呯殑鍗蟲椂棰勮鍜屸�滃闂存媿鎽勨�濇ā寮忥紝浣跨敤鍥涘儚绱犲悎涓�鎶�鏈湪浣庡厜婧愮幆澧冧笅鎷嶄笅浠や漢鎯婅壋鐨勭収鐗囥�?/p>
銆�銆�MTK6789(MT6789)鏍稿績鏉挎彁渚涘己澶х殑 4G LTE 鍔熻兘錛屽叿鏈夊厛榪涚殑璋冨埗瑙ｈ皟鍣ㄥ姛鑳藉拰鍏ㄧ悆棰戞瑕嗙洊錛岀‘淇濆揩閫熷彲闈犵殑浜掕仈緗戣繛鎺ャ�傚畠榪樻敮鎸佸熀鏈殑鍙?
4G SIM銆佸弻 VoLTE 鍜?ViLTE錛屾彁渚涘鍔熻兘涓斿彲闈犵殑楂樻竻閫氳瘽璐ㄩ噺浣撻獙銆?/p>
銆�銆�鍏峰鍑鴻壊璁＄畻鍜屽浘褰㈠鐞嗚兘鍔涳紝鏀寔楂樻竻緙栬В鐮佸拰澶氬睆寮傛樉錛屾嫢鏈夐珮閫熷瓨鍌ㄤ笌鍐呭瓨錛屾帴鍙ｄ赴瀵岋紝鏀寔紜歡璧勬簮闅旂錛屽箍娉涘簲鐢ㄤ簬宸ヤ笟銆丄loT
絳変紬澶氶鍩燂紝鑳芥弧瓚充笉鍚屽満鏅渶姹傦紝鍦ㄤ繚璇佹�ц兘鐨勫悓鏃舵湁鏁堥檷浣庡姛鑰楋紝寤墮暱璁懼緇埅銆?/p>
銆�銆�MT6789鏍稿績鏉垮叿鏈変互涓嬬壒鎬?/strong>:
銆�銆�鏈�浣沖昂瀵革紝淇濊瘉寮曞嚭鍏ㄩ儴GPIO鍙ｇ殑鍚屾椂錛屽昂瀵鎬粎39.5 x 53.5mm:
銆�銆�鏀寔澶氱鍝佺墝錛屽縐嶅閲忕殑UFS:
銆�銆�浣跨敤LPDDR4x璁捐錛屾渶楂樻敮鎸?2GB:
銆�銆�鏀寔鐢墊簮浼戠湢鍞ら啋:
銆�銆�鏀寔MIPI-CSI銆丮IPI-DSI銆丳CIE銆乁SB3.0絳夐珮閫熸�葷嚎:
銆�銆�閲囩敤184pin LCC + 32pin LGA灝佽:
銆�銆�MT6789瀹夊崜鏍稿績鏉跨‖浠跺弬鏁?/strong>
銆�銆�CPU錛氳仈鍙戠MT6789 2脳A76 2.2GHz+6x Arm Cortex-A55 2.0GHz,6nm宸ヨ壓鍒剁▼
銆�銆�GPU錛欰RM Mali-G57 MC2
銆�銆�鍐呭瓨錛?GB LPDDR4X(鍙�?GB/8GB/10GB/12GB)+64GB UFS(鍙�?28GB/256GB/512GB)
銆�銆�鎿嶄綔緋葷粺錛欰ndroid 13.0鎴栦互涓?/p>
銆�銆�瑙嗛瑙ｇ爜錛?K@30fps, FHD@60fps, HD@120fps H.264,H.265/HEVC,VP-9
銆�銆�瑙嗛緙栫爜錛?K@30fps, FHD@60fps, HD@120fps H.264, H.265/HEVC
銆�銆�棰戞淇℃伅錛?/p>
銆�銆�LTE Cat-6/Cat-13錛屾敮鎸佸叏鐞冧富嫻侀孌碉紝榛樿鍥藉唴棰戞*
銆�銆�FDD-LTE:B1(B4)/B2/B3/B5(B19)/B8/B20(B12/B17)/B28
銆�銆�TDD-LTE:B34/B38/B39/B40/B41
銆�銆�WCDMA:B1/B5/B8
銆�銆�EVDO/CDMA:BC0
銆�銆�GSM/EDGE:850/900/1800/1900MHz
銆�銆�WIFI: 2.4GHz/5GHz鍙岄孌碉紝鏀寔AP鐑偣
銆�銆�BT: Bluetooth 5.2
銆�銆�GNSS: GPS/GLONASS/鍖楁枟/QZSS/GALILEO錛屾敮鎸丄-GPS
銆�銆�FM錛氭敮鎸丗M Radio
銆�銆�鏄劇ず鎺ュ彛錛?-lane MIPI DSI錛屾敮鎸佸垎杈ㄧ巼鏈�楂?FHD+(2560*1080) 120fps
DSC錛屾敮鎸?-100瀵告樉紺哄睆錛屽彲鎵╁睍RGB/LVDS/EDP/HDMI鎺ュ彛
銆�銆�瑙︽懜鎺ュ彛錛欼2C鎴朥SB鎺ュ彛鐢靛寮忚Е鎽稿睆
銆�銆�鎽勫儚澶存帴鍙ｏ細3緇?-lane MIPI CSI錛屾敮鎸?4MP@22fps, 16MP+16MP@30fps鎽勫儚澶?/p>
銆�銆�闊抽鎺ュ彛錛氭壃澹板櫒*2銆侀害鍏嬮*2銆丏-MIC*2銆佸惉絳掋�佽�蟲満銆両2S*4
銆�銆�IO鎺ュ彛錛歎ART*3銆両2C*7銆丼PI*5銆丳WM*3銆丄DC*1銆並eypads銆丒INT/GPIOs鑻ュ共(IO寮曡剼鍙鐢?
銆�銆�SDIO鎺ュ彛錛氫竴璺疭D 3.0錛屾敮鎸?浣峉DIO錛屾渶澶ф敮鎸?TB TF鍗?/p>
銆�銆�SIM鍗℃帴鍙ｏ細SIM*2錛屾敮鎸?1.8/3.0V (U)SIM鍗?/p>
銆�銆�USB鎺ュ彛錛歎SB2.0(OTG)錛屾渶楂橀�熺巼480Mbps
銆�銆�澶╃嚎綆＄悊錛歀TE_MAIN涓婚泦澶╃嚎錛孡TE_DRX鍒嗛泦澶╃嚎錛學iFi/BT/GNSS澶╃嚎錛孏NSS鐙珛澶╃嚎
銆�銆�鐢墊簮綆＄悊錛氬唴緗數婧愮鐞嗭紝鏀寔鍏呮斁鐢?/p>
銆�銆�灝哄錛?9.5 x 53.5 x 2.9mm
銆�銆�灝佽錛?84pin LCC + 32pin(闈炲父鐢? LGA
銆�銆�杈撳叆鐢靛帇錛?.5V~ 4.4V