銆�銆�MTK8390鏍稿績鏉挎槸涓�嬈鵑珮鎬ц兘鐨勬ā鍧楋紝鍩轟簬鍒涙柊鐨凪T8390(Genio
700)澶勭悊鍣紝閲囩敤鍏堣繘鐨?nm宸ヨ壓璁捐銆傝妯″潡閰嶅浜嗗叓鏍窩PU錛屽寘鍚袱涓己澶х殑Arm
Cortex-A78瓚呯駭鏍稿績(涓婚杈?.2GHz)鍜屽叚涓珮鏁堢殑Cortex-A55鏍稿績(涓婚2.0GHz)錛岃兘澶熻交鏉懼簲瀵瑰浠誨姟澶勭悊鍙婇珮鎬ц兘璁＄畻鐨勯渶姹傦紝紜繚鍦ㄥ悇縐嶅簲鐢ㄥ満鏅腑瀹炵幇楂樻晥榪愮畻銆傝繖嬈炬牳蹇冩澘鐗瑰埆閫傚悎杈圭紭璁＄畻鍜孉I搴旂敤錛屽叿澶囧嚭鑹茬殑鎬ц兘銆佸厛榪涚殑澶氬獟浣撴敮鎸佸強鍗撹秺鐨勮兘鏁堛�?/p>
銆�銆�鍦ㄥ唴瀛樻柟闈紝MTK8390鏍稿績鏉垮彲鏀寔楂樿揪8GB鐨勫洓閫氶亾鍐呭瓨(濡侺PDDR4X)錛屽茍鍏煎eMMC
5.1絳夊縐嶅瓨鍌ㄤ粙璐紝鐢ㄦ埛鍙牴鎹渶瑕侀�夋嫨鍚堥�傜殑瀛樺偍瀹歸噺錛屼互婊¤凍鍚勭被緋葷粺鍜屽簲鐢ㄧ殑鏁版嵁瀛樺偍闇�姹傘�?/p>
銆�銆�璇ユā鍧楅泦鎴愪簡寮哄ぇ鐨凙rm Mali-G57
GPU錛屼笉浠呭叿澶囦紭瓚婄殑鍥懼儚璐ㄩ噺錛岃繕鏀寔鍙屾樉紺鴻緭鍑猴紝鑳藉榪涜楂樻晥鐨勫浘褰㈠鐞嗐�傚叾鏀寔澶氳揪4K60涓嶧HD60鐨勫弻鏄劇ず錛屼互鍙?K30鐨勭紪鐮佽兘鍔?H.265/H.264)錛屽悓鏃跺叿澶?K75鐨勮В鐮佽兘鍔?AV1/VP9/H.265/H.264)錛屼嬌鍏跺湪浜掑姩騫垮憡鍜屾祦濯掍綋闊寵棰戝簲鐢ㄤ腑琛ㄧ幇鍗撹秺銆?/p>
銆�銆�MTK8390鏍稿績鏉胯繕瑁呭鏈夊己澶х殑澶氭牳AI澶勭悊鍗曞厓(APU)錛屾彁渚涢珮杈?TOPS鐨勫鐞嗚兘鍔涳紝閫傚悎娣卞害瀛︿範鍜岀緇忕綉緇滃姞閫熷簲鐢ㄣ�傚畠鍙互閰嶅悎楂樿揪32MP鍜?0fps鐨勫垎杈ㄧ巼鐩告満錛岄�氳繃鑺墖鍐呯殑ISP鍜孧IPI-CSI鎺ュ彛錛屽紑灞曡綆楁満瑙嗚浠誨姟錛屼究浜庡疄鐜頒漢鑴歌瘑鍒拰鐗╀綋璇嗗埆絳夊姛鑳姐�?/p>
銆�銆�鍦ㄨ繛鎺ユ�ф柟闈紝鏍稿績鏉挎敮鎸佸縐嶇伒媧葷殑I/O鎺ュ彛錛岄�傞厤浜庣墿鑱旂綉搴旂敤錛屽寘鎷珿bE銆乄iFi-6銆?G妯″潡銆佽摑鐗?.0銆佷互澶綉MAC浠ュ強鐢墊簮綆＄悊絳夊姛鑳姐�傚叾楂樻�ц兘涓庝紭寮傜殑鑳芥晥緇撳悎錛屼嬌寰椾駭鍝佽璁″笀鍙互鍦ㄤ笉闇�瑕侀鎵囩殑鎯呭喌涓嬭繍琛岋紝鐢氳嚦鍙互閲囩敤紱葷綉鐢墊簮瑙ｅ喅鏂規錛屾嫇瀹戒簡搴旂敤鐨勫彲鑳芥�с�?/p>
銆�銆�姝ゅ錛岃鏍稿績鏉胯繕鏀寔涓板瘜鐨勫閮ㄦ帴鍙ｏ紝鍖呮嫭MIPI
DSI銆丒DP銆丏P銆丠DMI銆佽Е鎺ф帴鍙ｃ�佸弻鎽勫儚澶淬�乁SBx3(USB2.0x2錛孶SB3.1x1)銆佷覆鍙?UARTx4)銆両2Cx6銆丼PIx5銆両2Sx3銆丄DCx3銆侀敭鐩樿緭鍏ュ強GPIO絳夛紝紜繚浜嗛珮閫熸暟鎹紶杈撳茍鎻愪緵紼沖畾鐨勮繛鎺ワ紝鑳藉榪炴帴澶氱澶栭儴璁懼錛屾瀬澶у湴涓板瘜浜嗗叾浣跨敤鍦烘櫙銆?/p>
銆�銆�MT8390(Genio 700)瀹夊崜鏍稿績鏉胯鏍煎弬鏁?/strong>
銆�銆�CPU錛歁T8390 6nm宸ヨ壓鍒剁▼鍏牳澶勭悊鍣?2x ARM Cortex-A78 2.2GHz+6x ARM Cortex-A55
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銆�銆�GPU錛欰RM Mali-G57 MC2 @950Mhz
銆�銆�APU錛?x MDLA3.0 + 1x VP6錛岀畻鍔涜揪4.0 TOPS
銆�銆�鍐呭瓨錛?GB LPDDR4X(Optional 2G/6G/8G)錛?2GB eMMC (Optional 64G/128G/256G)
銆�銆�鎿嶄綔緋葷粺錛欰ndroid 13.0鎴栦互涓?/p>
銆�銆�瑙嗛瑙ｇ爜錛?K @ 75FPS, AV1/VP9/HEVC/H.264
銆�銆�瑙嗛緙栫爜錛?K @ 30FPS, HEVC/H.264
銆�銆�WIFI錛?.4GHz/5GHz鍙岄孌礧IFI (鍙�塛IFI6)錛屾敮鎸?02.11 a/b/g/n/ac, 鏀寔AP鐑偣
銆�銆�LAN錛?0M/100M/1000Mbps浠ュお緗慚AC
銆�銆�BT錛欱luetooth 5.0
銆�銆�鎺ュ彛淇℃伅錛?/p>
銆�銆�鏄劇ず鎺ュ彛錛歁IPI DSI 4 lane x 2緇凩CM錛宔DP 2 lane錛孌P 4 lane錛孒DMITX
2.0錛孌PI錛屾敮鎸佸弻灞忓紓鏄?4K30fps + 4K60fps)
銆�銆�瑙︽懜鎺ュ彛錛欼2C鎴朥SB鎺ュ彛鐢靛寮忚Е鎽稿睆
銆�銆�鎽勫儚澶存帴鍙ｆ帴鍙ｇ被鍨嬶細MIPI CSI 4 lane脳2 Camera錛屾敮鎸?璺憚鍍忓ご錛屽崟璺渶楂樻敮鎸?2MP@30fps錛屾敮鎸丠W Dual
CAM鍙屾憚鍙屽綍鍔熻兘
銆�銆�闊抽鎺ュ彛錛氭壃澹板櫒*2銆侀害鍏嬮*2銆佽�蟲満銆丼PDIF銆両2S/PCM脳3銆乀DM銆丳DM/D-MIC脳4ch
銆�銆�IO鎺ュ彛錛歅CIE G2(1
lane)銆乁ART脳4銆佹渶楂橀�熺巼961200bps錛孖2C/I3C脳6銆侀�熺巼100K/400K/3.4Mbps(DMA)銆丼PI脳5錛孭WM脳4銆丄DC脳3銆並eypads(鐢ㄦ埛鍙嚜瀹氫箟)銆丒INT/GPIOs鑻ュ共(IO寮曡剼鍙鐢?
銆�銆�SDIO鎺ュ彛錛氫竴璺疭D鍗℃帴鍙ｏ紝鏈�楂樻敮鎸?TB TF鍗★紝鏀寔鐑彃鎷?/p>
銆�銆�USB鎺ュ彛錛歎SB2.0(OTG) ,鏈�楂橀�熺巼480Mbps錛孶SB 3.1 Gen1 TypeC鎺ュ彛錛屾敮鎸丏isplayPort
1.4錛屾敮鎸乁SB&DP騫跺彂錛屾敮鎸丱TG妯″紡
銆�銆�澶╃嚎鎺ュ彛錛歐iFi澶╃嚎脳2錛孊T澶╃嚎脳1
銆�銆�鐢墊簮綆＄悊錛氬唴緗數婧愮鐞咺C錛屽彲閫夋敮鎸佸厖鏀劇數
銆�銆�灝哄錛?5*45*2.8mm
銆�銆�灝佽錛?06PIN LGA
銆�銆�宸ヤ綔鐜杈撳叆鐢靛帇3.5V~ 4.2V
銆�銆�宸ヤ綔娓╁害錛?20擄C ~+70擄C
銆�銆�鍙�夊伐涓氬娓╋細-40擄C ~+105擄C
銆�銆�閰嶅寮�鍙戞澘鎴栧簳鏉垮伐浣?/p>